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hexapod_ng/legacy/flash-programmer/parallel_flash_memory_uart_...

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  1. # Constraints for 'parallel_flash_memory_uart_programmer'.

  2. #

  3. # Revision C of the Spartan-3E Starter Kit.

  4. #

  5. # Ken Chapman - Xilinx Ltd - 28th March 2006

  6. #

  7. #

  8. # Period constraint for 50MHz operation

  9. #

  10. NET "clk" PERIOD = 15.0ns HIGH 50%;

  11. #

  12. #

  13. # soldered 50MHz Clock.

  14. # 

  15. NET "clk" LOC = "P122" | IOSTANDARD = LVTTL;

  16. #

  17. #

  18. #

  19. # UART connections

  20. #

  21. NET "tx_female" LOC = "P32" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 4;

  22. NET "rx_female" LOC = "P29"  | IOSTANDARD = LVTTL;

  23. #

  24. #

  25. # Strata Flash 

  26. # 128MBit = 16,777,216 bytes requiring 24 address bits.

  27. #

  28. NET "strataflash_oe"    LOC = "P105" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  29. NET "strataflash_ce"    LOC = "P104" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  30. NET "strataflash_we"    LOC = "P103" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  31. #NET "strataflash_byte"  LOC = "C17" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  32. #NET "strataflash_sts"   LOC = "B18" | IOSTANDARD = LVCMOS33 | PULLUP;

  33. #

  34. NET "strataflash_a<0>"  LOC = "P98" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  35. NET "strataflash_a<1>"  LOC = "P97" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  36. NET "strataflash_a<2>"  LOC = "P96" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  37. NET "strataflash_a<3>"  LOC = "P94" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  38. NET "strataflash_a<4>"  LOC = "P93" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  39. NET "strataflash_a<5>"  LOC = "P92" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  40. NET "strataflash_a<6>"  LOC = "P91" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  41. NET "strataflash_a<7>"  LOC = "P88" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  42. NET "strataflash_a<8>"  LOC = "P87" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  43. NET "strataflash_a<9>"  LOC = "P86" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  44. NET "strataflash_a<10>" LOC = "P85" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  45. NET "strataflash_a<11>" LOC = "P82" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  46. NET "strataflash_a<12>" LOC = "P81" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  47. NET "strataflash_a<13>" LOC = "P77" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  48. NET "strataflash_a<14>" LOC = "P76" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  49. NET "strataflash_a<15>" LOC = "P75" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  50. NET "strataflash_a<16>" LOC = "P74" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  51. NET "strataflash_a<17>" LOC = "P70" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  52. NET "strataflash_a<18>" LOC = "P68" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  53. NET "strataflash_a<19>" LOC = "P67" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  54. NET "strataflash_a<20>" LOC = "P71" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  55. #NET "strataflash_a<21>" LOC = "P63" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  56. #NET "strataflash_a<22>" LOC = "V12" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  57. #NET "strataflash_a<23>" LOC = "N11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  58. #

  59. NET "strataflash_d<0>"  LOC = "P63" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  60. NET "strataflash_d<1>"  LOC = "P59" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  61. NET "strataflash_d<2>"  LOC = "P58" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  62. NET "strataflash_d<3>"  LOC = "P54"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  63. NET "strataflash_d<4>"  LOC = "P53"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  64. NET "strataflash_d<5>"  LOC = "P52"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  65. NET "strataflash_d<6>"  LOC = "P51"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  66. NET "strataflash_d<7>"  LOC = "P50"  | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 4;

  67. #

  68. #

  69. # LCD display

  70. # (Disable LCD display to ensure no contention with StratFlash memory). 

  71. #

  72. #NET "lcd_rw"   LOC = "L17" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  73. #NET "lcd_e"    LOC = "M18" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  74. #

  75. #

  76. # SPI devices 

  77. # (Disable to prevent contention with StratFlash memory data bit0). 

  78. #

  79. #NET "spi_rom_cs"   LOC = "U3"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  80. #NET "spi_adc_conv" LOC = "P11" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  81. #NET "spi_dac_cs"   LOC = "N8"  | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  82. #

  83. #

  84. # Platform Flash memory

  85. # (Disable to prevent contention with StratFlash memory data bit0). 

  86. #

  87. #NET "platformflash_oe" LOC = "T3" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 2;

  88. #

  89. # End of File

  90. #